An overview of memory organisation All general purpose processors, be it Intel, ARM or AVR devices work by reading instructions from memory and executing them. They are generally based on one of two Architectures: Von-Neumann or Harvard. The vast majority of larger systems such as PC’s and mobile devices use Von-Neumann, but AVR processors in Arduino boards such as Uno and Mega use Harvard architecture. In a Von-Neumann processor there is one memory area, all program code, data, EEPROM and IO registers share a single memory space, with everything mapped to unique address ranges.
While writing the IoAbstraction library and Tc Menu library I noticed that SRAM memory usage seemed to increase at a rate greater than what seemed right by static evaluation of all the objects I had created. This will become a series of articles on the subject of efficiency in micro-controller environments. In this part, we’ll look at how to evalulate memory on your device, and see how to use underlying avr tools to examine the memory requirements.
In part 2 of this series we discuss how sketches compile on Arduino, along with the cost of using the virtual keyword to create virtual classes. Some things are not quite as clear cut as may be initially thought, especially in the very low memory environment of the ATMega328 (Arduino Uno). Lastly we discuss the memory usage of Wire and how to reduce it. If you’ve not read static memory analysis for Arduino - part 1 then I recommend reading that first, as it sets the background for this article.